Virtex-7 FPGA Family

By: Xilinx  09-12-2011
Keywords: System Performance, Block Ram

World’s Highest Capacity FPGA - Now Shipping

Industry's Highest System Performance

The Virtex-7 family consists of T, XT and HT devices to meet a wide array of market requirements:

Unified Architecture Enables Scalability and Increases Productivity

Virtex-7 FPGA Key Capabilities

Maximum Capability Virtex-7 T Devices Virtex-7 XT Devices Virtex-7 HT Devices
Logic density (Logic Cells) 1,955K 1,139K 864K
Peak transceiver speed 12.5Gb/s
Transceivers 36 96 88
Peak bi-directional serial bandwidth 0.900 Tb/s 2.515Tb/s 2.784Tb/s
DSP throughput (symmetric filter) 2,756 GMACS 5,314 GMACS 5,053 GMACS
Block RAM 46.5Mb 85.0Mb 64.4Mb
PCI Express® interface Gen2x8 Gen3x8 Gen3x8
I/O pins 1,200 1,100 700

System Solutions Enabled by Virtex-7 FPGAs

Delivering the highest bandwidth with the lowest power, Virtex-7 FPGAs address the insatiable demand for networking infrastructure bandwidth. Delivering up to 2.8Tb/s serial bandwidth, these devices enable communications equipment manufacturers to increase network capacity with next-generation hardware that operates within existing power and cooling footprints.

See How Virtex-7 FPGAs Will Benefit Your Next Design

Application Description
Build a highly integrated ASIC prototyping solution with the Virtex-7 2000T. With its high logic and processing capacity, mitigate development risks for large ASIC and ASSP designs.
Build a 2x100G OTU4 Transponder/Line Card using the only 28nm FPGAs that enable designers to integrate two 100G interfaces into a single FPGA for reduced board space, power, and cost.
Meet aggressive 10G port count integration and cost targets for Passive Optical Network (PON) Optical Line Terminal (OLT) Line Cards that bring high-speed networking to the neighborhood/home.
Virtex-7 FPGAs offer the right mix of I/O, memory and logic to enable a single-FPGA implementation of new line cards that deliver increased bandwidth.
Virtex-7 FPGA XT devices enable a flexible, single-FPGA, 100G OTN Multiplexing Transponder implementation.
Create a 300G Interlaken Bridge that enables infrastructure scaling with devices that deliver up to 1.9Tbps bandwidth for bridging between MAC-NPU, NPU-Switch, NPU-TCAM using the Interlaken industry standard.
Be first to market with 400GE Line Cards by designing with the only FPGAs to support 400G serial interfaces with next-generation optics.
Enable high performance RADAR systems through low power, multi-channel signal recovery and processing.
Virtex-7 FPGA XT device capabilities enable Terabit Switch Fabric to support proliferating 40G/100G ports in networking infrastructure.

Keywords: Block Ram, System Performance,

Other products and services from Xilinx


Software and Design Tools

The industry's only free, fully featured front-to-back FPGA design solution for Linux, Windows XP, and Windows Vista. The easiest, lowest cost way to get started with the industry leader for productivity, performance, and power. Easily upgradeable to any of the ISE Design Suite Editions. A free FPGA and CPLD logic design solution.


Xilinx Zynq-7000 Extensible Processing Platform

In addition, the Zynq-7000 EPP family, with over 3000 interconnections between its processing system and the programmable logic, offers levels of performance that two-chip solutions cannot match due to limited IO bandwidth and limited power budgets.


Configuration Memory

Developed to provide an easy-to-use high-performance programming solution, Xilinx offers a full range of configuration memories optimized for use with Virtex® and Spartan® FPGAs. Separate core and configuration voltages for complete voltage selection capability. Complete configuration solution that provide fast configuration speeds. 40 Mhz for Platform Flash, 50 MHz for Platform Flash XL. Design management storing, updating and controlling.


Xilinx CPLDs offer High Performance and Ultra-low Power Consumption

Macrocells are functional blocks that perform combinatorial or sequential logic, and also have the added flexibility for true or complement, along with varied feedback paths. A CPLD is a combination of a fully programmable AND/OR array and a bank of macrocells. The AND/OR array is reprogrammable and can perform a multitude of logic functions. Lowest Cost, Lowest Power CPLDs.


Xilinx FPGAs Offer High-Performance, Low-Power, Low-Cost Silicon Devices

As opposed to Application Specific Integrated Circuits where the device is custom built for the particular design, FPGAs can be programmed to the desired application or functionality requirements. Field Programmable Gate Arrays are programmable semiconductor devices that are based around a matrix of configurable logic blocks connected via programmable interconnects.


Power Advantage

Here you will find detailed total power benchmarks representing real application designs across multiple market segments, demonstrating the power-efficiency leadership of Xilinx 7 series FPGAs. Power efficiencies realized through a 28nm high-performance, low power process, coupled with architecture innovations and simple and efficient power estimation tools.


Silicon Devices, Design Tools, Boards and Kits, IP, and Services

An extensive catalog of base-level cores is available to address the general needs of FPGA designers, as well as robust domain- and market-specific cores to address requirements found in DSP, Embedded, and Connectivity designs. Xilinx Intellectual Property are key building blocks of Xilinx Targeted Design Platforms.