Confocal Scanning Acoustic Microscopy (CSAM) :: MuAnalysis

By: Muanalysis  09-12-2011
Keywords: failure analysis, Integrated Circuits

SAM image of a packaged integrated circuit. Red areas indicate delamination of the die.

Scanning Acoustic Microscopy (SAM) is a quick, non-destructive analysis technique. SAM uses ultrasound waves to detect changes in acoustic impedances in integrated circuits (ICs) and other similar materials. Pulses of different frequencies are used to penetrate various materials to examine sample interiors for voids or delamination. MuAnalysis performs C-mode SAM (or C-SAM), with both reflective and through-scan capabilities.

Assessing package reliability often requires the ability to study package interiors without destroying the packages. Scanning Acoustic Microscopy allows the user to examine different interfaces and determine the mechanical integrity of the assembly, all by non-destructive means.

Scanning acoustic microscopy probes with ultrasound pulses at various frequencies. At interfaces between materials having different acoustic impedances, an acoustic reflection (an echo) occurs. The intensity and polarity of this echo is recorded and presented as a colour map of the sample.

MuAnalysis uses a wide range of transducer frequencies, providing the flexibility to look at various materials and sites. Low frequency transducers, such as 10, 15, 20 and 30 MHz, allow for higher penetration through materials but lower spatial resolution. Higher frequency transducers, such as 100 and 230 MHz, give higher resolution and are used once an area of concern has been isolated. Reflective microscopy looks for voiding at a certain interface. Through-scan microscopy detects voids at any depth in the device.

At MuAnalysis, on-site physical and failure analysis supports further investigation if required.

SAM through-scans as part of MSL. Black areas indicate delamination.

Evaluation of:

  • Die attach integrity
  • Heat spreader adhesion
  • Solder bump quality

Detection of:

  • Die surface delamination
  • Metallization burnout

Keywords: failure analysis, Integrated Circuits

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