Embedded Systems Executable Specifications and Use Cases Modeling

By: Cofluent Design  09-12-2011
Keywords: modeling, embedded systems, Embedded System




How to specify an embedded system and validate its specification?

Executable specifications and use cases modeling

  • Behavioral/functional modeling and verification
  • SystemC generation for reuse in verification environments

As embedded systems get more and more complex, designers need a way to specify them in an effective and non-ambiguous manner. This is especially important when part of the development is done by different teams or subcontracted to other companies.

allows engineers to create executable specifications of their system by modeling its functionality and use cases using simple yet powerful graphical notations. The strong semantics of notations allow simulation of the model. Algorithms can be left empty and abstracted by their sole execution time budgets, or can be defined with C/C++ or . Communications can be based on real data defined in C/C++ or just represent "tokens" with timestamps and payload. Simulations are driven by use cases for validating the model behavior and time properties. The automatic SystemC TLM code generation allows reuse of IP or use case models for integration and simulation into SystemC-based . When modeling hardware IP, the generated SystemC test case can be used as testbench for validating the RTL implementation.

  • Facilitating transition from idea/concept to design
    • Creating realistic workload scenarios driving simulations
    • Models enable experimentations and enhance innovation
    • Simulations facilitates analysis and exchanges in teams
    • Models provide supports for patents
  • Increasing productivity
    • Graphics allow to better express design intent and handle complexity
    • Graphics are 10x more efficient than C/C++ programming
  • Optimizing design
    • Block decomposition, pipeline, buffers, timings..
  • Facilitating implementation & validation
    • Providing executable specifications for implementation
    • Reusing testbench for validation
    • Reusing model for integration to system simulation

CoFluent Studio offers an alternative to the manual modeling of new IP and IP-level or platform-level test cases for virtual platforms/prototypes by providing an efficient graphical modeling entry and automatic SystemC TLM code generation. It can offer up to 10x productivity gains compared to hand-programming and can be used by non-SystemC experts. It significantly accelerates the availability of a complete virtualization environment and facilitates the creation of application-realistic workload use cases when software is not available yet.

CoFluent Studio allows the creation and automatic generation of SystemC models for:

  • Any OSCI SystemC 2.2-based simulation environment
  • Synopsys Innovator
  • Mentor Graphics Questa
  • Synopsys System Studio
  • CoWare Platform Architect

Graphical models are captured and their behaviors and timings are validated within CoFluent Studio at a functional level. TLM SystemC code is automatically generated from the graphical description and can be integrated to virtual platform/prototype environments through the OSCI standard TLM-2.0 interface. Models can also serve as executable specifications for implementation, offering a continuous development flow from executable specifications to virtual platforms.

Keywords: Embedded System, embedded systems, modeling, System Simulation, Test Cases,

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